1. Field of the Invention
The present invention relates to an electrically data-rewritable nonvolatile semiconductor memory device and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, an LSI is formed by integrating elements in a two-dimensional plane on a silicon substrate. It is common practice to increase a storage capacity of memory by reducing dimensions of (miniaturizing) an element. However, in recent years, even this miniaturization is becoming difficult in terms of cost and technology. Improvements in photolithographic technology are necessary for miniaturization, but costs required for lithographic processes are steadily increasing. Moreover, even if miniaturization is achieved, it is expected that physical limitations such as those of withstand voltage between elements are encountered, unless the drive voltage and so on are scaled. In other words, there is a high possibility that operation as a device becomes difficult.
Accordingly, in recent years, there is proposed a semiconductor memory device in which memory cells are disposed three-dimensionally in order to increase a degree of integration of memory (refer to patent document 1: Japanese Unexamined Patent Application Publication No. 2007-266143).
One conventional semiconductor memory device in which memory cells are disposed three-dimensionally uses transistors with a cylindrical column-shaped structure (refer to patent document 1). The semiconductor memory device using the transistors with the cylindrical column-shaped structure is provided with multi-layer conductive layers configured to form gate electrodes, and pillar-shaped columnar semiconductors. The columnar semiconductor functions as a channel (body) portion of the transistors. A vicinity of the columnar semiconductor is provided with a memory gate insulating layer. A configuration including these conductive layer, columnar semiconductor, and memory gate insulating layer is called a memory string.
In order to provide select transistors (which utilize a non-charge-storing gate insulating film) when using the above-described technology, columnar semiconductors positioned one above the other and in contact with each other are formed in separate processes. When the columnar semiconductors are formed in separate processes and then joined, there is a risk that a contact resistance arising between the columnar semiconductors leads to an incorrect operation of the semiconductor memory device. That is, the semiconductor memory device using the above-described technology requires, for example, the likes of an interface treatment performed in a solution containing dilute hydrofluoric acid to connect upper and lower columnar semiconductors; however, there is a possibility that this causes the memory gate insulating layer to be damaged, thus making it difficult to secure a sufficiently high reliability.